Design Verification Engineer

Tasks
Develop test benches, write behavioral models and checkers, write directed tests, analyze test coverage, and formal verification.

Experience
Complex system verification including processor, memory, I/O bus, network and storage sub-systems. Have written directed tests; lab debug. Simulation experience also desired. Skills and Tools: Verilog/PLI, C/C++, Perl, Synopsys, VCS, Formality, PLI, FLEX, Bison, RTPG.

Requirements
BS (MS preferred) Electrical or Computer Engineering, 3 - 7 years experience.

  

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